STUDY OF SRAM AND ITS LOW POWER TECHNIQUES

This paper discusses the basic operations of SRAM such as write, read and hold. These operations are performed with help of tanner tools at .18μ m technology. The paper also discusses the low power design techniques for SRAM. There is a four type low power technique discussed here for SRAM. One is the Half-swing Pulse-mode techniques i n which a Half-swing Pulse-mode gate family is used that in turn uses reduced input signal swing without sacrificing performance and saves the power. Second is a memory bank partitioning, in which memory array is partitioned to enhance the speed and to reduce the power.