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DESIGN OF HIGH SPEED SUBTHRESHOLD INTERCONNECTS USING MCML TECHNIQUE

Journal: International Journal of Engineering Sciences & Research Technology (IJESRT) (Vol.5, No. 8)

Publication Date:

Authors : ; ; ;

Page : 729-736

Keywords : MOS current mode logic (MCML); Subthreshold; Delay; Power Delay Product(PDP); Energy Delay Product(EDP); Total delay(Tpd);

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Abstract

The recent trend in the VLSI industry toward miniature designs, low power consumption, and increased growth of portable applications compels resear chers to design circuit having h igh speed. This is achieved by operating circuits under subthreshold condition and by designing interconnects using various techniques. This paper presents designing of Subthreshold interconnects using MCML technique which exhibit s a decrease in delay in terms of designing o f interconnects under subthreshold region as compared to CMOS technique s . Circuit is implemented in 32nm MOS technology using HSPICE. The results illustrates that total delay improvement is achieved by using proposed system which helps the circuit to oper ate at high speed and it also improves propogation de lay and energy delay .

Last modified: 2016-08-17 20:55:03