Novel Processor Array Structure for Finite Field Inversion
Proceeding: Fourth International Conference on Technological Advances in Electrical, Electronics and Computer Engineering (TAEECE2016)Publication Date: 2016-09-06
Authors : Atef Ibrahim Turki Alsomani Fayez Gebali;
Page : 1-8
Keywords : Processor Arrays; Embedded Applications; Finite Field Inversion; Information Security; ASIC; Digital Circuits Design;
Abstract
In this paper we present new processor array structure to perform inversion operation in GF(2m) based on the modified extended Euclidean algorithm. This array has simple structure with processing elements have local communication with each other. Also, it has low area and power complexities as well as a moderate speed compared to the previously reported designs. ASIC implementation results of the proposed design and the previously reported ones show that the proposed design reduces area complexity by ratios ranging from 18.3% to 56.0% and also reduces energy by ratios ranging from 11.4% to 77.3% over the previously reported design. This makes the proposed design more suited to the embedded applications that have more restriction on area and power consumption.
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Last modified: 2016-09-11 23:03:01