ENERGY EFFICIENT FPGA USING OPTIMIZED SELF-ADAPTIVE CONTROLLER
Journal: IPASJ International Journal of Electronics & Communication (IIJEC) (Vol.4, No. 9)Publication Date: 2016-10-03
Authors : Mohit Bajpai; Dinesh Chand Gupta;
Page : 10-16
Keywords : Keywords: FPGA; Self-adaptive controller; Logic Block; Spice.;
Abstract
ABSTRACT This Paper presents energy efficient FPGA in which supply voltage is provided with the help Self Adaptive Controller (SAC) at common for each logic blocks, such that it does not affect the deadline of voltage (VT), with the help of self adaptive controller. This SAC is designed to select the dual mode of supply voltage, either VH= 1.2V & VL= 1.0V, depending upon critical path calculation. When the logic block is not at critical path the supply voltage is autonomously changes to low voltage (VL) and vice-versa to high voltage (VH). The designing of FPGA is based on conventional methods i.e. by using logic block, connection block and switch box with 45nm technology of transistor. The energy loss in FPGA working is, calculated by LT-spic software.
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Last modified: 2016-10-03 14:08:04