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Investigation of Electromagnetic Interference in Cmos Power Distribution Networks.

Journal: International Journal of Engineering Research (Vol.2, No. 7)

Publication Date:

Authors : ;

Page : 424-431

Keywords : Integrated circuit interconnection; on-chip inductance; power distribution network; simultaneous switching noise.;

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For predicting the EMI behavior of an integrated circuit it is necessary to perform an di/dt-analysis. For carrying out such a dynamic current analysis Signal integrity is the ability of a signal to generate correct responses in a circuit. It generally includes all effects that cause a circuit malfunction due to the distortion of the signal waveform [1]. According to this definition, a signal with good integrity presents: (i) voltage values at required levels and (ii ) level transitions at required times.Various signal integrity problems have been studied for high-speed gigahertz nanometer System-on- Chip . The most important ones are: (a) crosstalk (signal distortion due to cross coupling effects betweensignals)[2,3]; (b) overshoot/undershoot (momentarily signal rising/decreasing above/below the power supply voltage (VDD ) and ground (VSS ) lines [4,5]; (c) reflection (echoing back a portion of a signal, at high- frequency circuits, where interconnections behave as transmission lines); (d) electromagnetic interference ? EMI (resulting from antenna properties) [6,7]; (e) power-supply noise [8,9]; and (f) signal

Last modified: 2013-11-13 00:07:48