FPGA based Security Login System using GSM with OTP Generation

Security of system is major concern in this age of high-tech infrastructure. In todayâ?™s materialistic world, security holds an in dispensable place. Security in every aspect is highly desirable may be at home or at office etc. as thefts and robberies are increasing day by day. To overcome this security threat, a security system has been proposed using GSM technology, by generating One Time Password and implementing in FPGA. As FPGAs offer all of the features needed to implement most complex designs. This security system activates, authenticates and validates the user and then unlocks the system. This project attempts to create security login systemwhere the user is granted access if he enters the correct predefined password and is denied access if he enter the wrong password. When password is entered GSM gets activated and send SMS to userâ?™s mobile phone, after authentication random OTP is generated and should be verified such that the system gets accessed. In every 3 minutes this OTP verification code will change and is valid for 3 minutes. The outcome of each and all would be available in the LCD of the Spartan 3E board. VHDL codes are used to design this system using Xilinx ISE 9.2i.