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Implementation of Buffer for Network on Chip Router

Journal: The International Journal of Technological Exploration and Learning (Vol.3, No. 1)

Publication Date:

Authors : ;

Page : 362-365

Keywords : Network-on-Chip(NoC); System-on-Chip (SoC); Processing Element (PE); Virtual Channel (VC); Virtual Channel Allocator (VA); Switch Allocator (SA).;

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Network-on-Chip (NoC) introduces the design methodology of interconnection network into System-on-Chip (SoC). It overcomes the main disadvantages of traditional bus-based SoC, for example, large delay, small link bandwidth and poor scalability, etc. It is widely believed that NoC will replace bus-based architecture to become the mainstream of SoC design methodology. In NoC architecture the processing elements (PEs) communicate with each other by exchanging messages over the network and these messages go through buffers in each router. Buffers are one of the major resources used by the routers in virtual channel flow control.

Last modified: 2014-02-25 04:13:14