Design and Analysis of Row and Column Bypass multipliers using various logic Full AddersJournal: International Journal of Engineering and Techniques (Vol.4, No. 2)
Publication Date: 2018-04-25
Authors : Dr.R. Naveen Abhinaya K U Akilandeeswari N Anushya S Asuvanti M A;
Page : 151-157
Keywords : Multipliers; full adders; power consumption; area.;
An energy efficient processor which is the key for designing is multipliers. Multipliers play an important role in DSP blocks and in many applications. The multiplication is an essential arithmetic operation for common DSP and communication application, such as filtering and FFT. “Add and Shift” algorithm is the common multiplication method. The switching activities and ower consumption is reduced by introducing the number of zeros in the multiplicand bit. This design depends on the input bit coefficient in the switching activity of the component used.
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Last modified: 2018-05-22 16:30:38