Assembler Design for BZK.SAU.FPGA Micro Computer Architecture

It is necessary to constitute a memory organization and a memory map in the microcomputer architecture in order to allow operation systems and assembler to work. The BZK.SAU.FPGA microcomputer architecture assembler instruction set consists of 59 instructions and uses 6 different addressing modes. This work demonstrates how to design an assembly language from scratch on the BZK.SAU.FPGA microcomputer architecture. The assembler program uses the Brute-force Search Algorithm to convert the user source program to machine code