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Design and Implementation of Booth Multiplier and Its Application Using VHDL

Journal: International Journal of Scientific Engineering and Technology (IJSET) (Vol.3, No. 5)

Publication Date:

Authors : ; ; ; ; ;

Page : 561-563

Keywords : booth multiplier; calculator; Xilinx; modelsim; low power consumption multipier; Reduced area multiplier; serial multiplier; high speed multiplier.;

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Low power consumption and small area are some of the most important criteria for design of any high performance systems[i]. So in this paper the best solution to the problem is determined by designing a high speed multiplier chiefly booth multiplier which reduces the number of flip flops and memory size in the design circuitry as compared to conventional serial multiplier. Then implementation of a calculator using booth multiplier and several other operational modules is done using codes written in VHDL language using ISE XILINX 6.1 and simulated in MODEL SIM 5.4a.

Last modified: 2014-09-27 23:40:15