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Journal: International Journal of Electrical Engineering and Technology (IJEET) (Vol.11, No. 3)

Publication Date:

Authors : ;

Page : 186-193

Keywords : Squared Euclidean Distance; Euclidean Distance; Hardware Accelerator; FPGA; IP Core; IEEE-754 Single Precision.;

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With an increased reliance on the integrated circuits (IC), there has been a tremendous increase in the demand for the intellectual property (IP) cores by the industries, as they showcase minimal design time and high productivity. This paper delineates a novel pipelined architecture of Euclidean Distance IP core and Squared Euclidean Distance IP core, designed to work on IEEE 754–Floating-point SinglePrecision Data format, with the flexibility to select a number of variables (data points) up to 65535. IP Core is designed and implemented on FPGA-Zedboard Zynq-7000, and to be used in future on FPGAs.

Last modified: 2021-03-03 17:43:30