VLSI Design in Terms of Power System

Power dissipation has become an important consideration as performance and area for VLSI Chip design. With shrinking technology reducing power consumption and over all power management on chip are the key challenges below 100nm due to increased complexity. For many designs, optimization of power is important as timing due to the need to reduce package cost and extended battery life. It has been shown that scheming VLSI for power entails a design methodology at every level of the design grading. The main components of such a methodology are estimation and optimization, the classical analysis and amalgamation pair. In order to estimate and optimize the power consumption of a digital circuit it is necessary to know how energy is intemperate. The way each factor interrelates with the others will also clarify the effects these elements have on every VLSI design stage. This analysis will determine which elements can be disregarded within a specific design environment.