A Novel Design of Low Power 4:2 Compressor using Adiabatic Logic

The purpose of the project is to design an adiabatic logic based low power 42 Compressor on the application of Two Phase Clocked Adiabatic Static Logic (2PASCL) technique, which shows the lowest power dissipation between different adiabatic logic families. It works on the principle of charge reversible logic. The present technique has smallest power dissipation relative to the standard CMOS design style by using different design specification such as different input signal switching frequency and supply voltage. The simulation is performed on S-edit of Tanner tool at 90nm BSIM4 technology.