Modified SIFT Algorithm for Image Feature Detection

Image feature detection is the fundamental task in most of the video analytic and computer vision systems. The feature keypoints from the images taken at different instant is detected in these systems. To most of the embedded systems, the challenge is its large complexity in computation. This computational complexities and time consuming properties are eliminated by proposing a new feature detector based on SIFT algorithm. Efficient image feature detection and matching is a fundamental problem in object recognition, image indexing, visual localization etc. The thesis work proposes a new FPGA-based embedded architecture for image feature detection. In this the modified Scale Invariant Feature Transform (SIFT) feature detector is used to reduce the utilization of FPGA resources. An optimized Gaussian filtering is undergone in this design for reducing the memory utilization. The corresponding key-points obtained can be either used in an embedded application or accessed via Ethernet for remotely computer vision applications