VHDL-AMS Model for Switched Resistor ?? Modulator

This paper introduces modeling of switched resistor (SR) modulator in analog mixed signal (AMS). Such design consists of 2nd order single bit SR modulator with dissipated power of 0.65mW and 3rd order digital decimation filter. SR technique is better than the other techniques for simplicity, less noise and low power dissipated in hardware realization. The proposed digital filter design consists of a third order Cascaded integrator Comb filter (CIC). The system occupies a small silicon area due to no multipliers used. Our design and simulation are implemented using Mentor Graphics VHDL-AMS tools. The final result has resolution of 12-Bit using 32 Oversampling ratio.