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Network-on-Chip Architecture Based on Cluster Method

Journal: International Journal of Scientific Engineering and Research (IJSER) (Vol.3, No. 3)

Publication Date:

Authors : ;

Page : 61-65

Keywords : cluster; on-chip; bus; topology;

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Network-on-Chip architectures are emerging for the highly scalable, reliable, and modular on-chip communication infrastructure platform. On-chip networks utilize 2-D mesh topology. As the number of the cores present on-chip is increasing rapidly, the diameter of the network-on-chip is also increasing rapidly, which leads to large delay and energy consumption. The NoC architecture uses layered protocols and packet-switched networks which consist of on-chip routers, links, and network interfaces on a predefined topology. This paper proposed a cluster based topology with long-range links insertion algorithm. Finally, we evaluate the performance of the topology proposed in this paper through simulations.

Last modified: 2021-07-08 15:22:18