Universal Scheduler for AFDX Based on BAG Concept

Avionic Full-Duplex Switched Ethernet (AFDX), is a specification for a deterministic aircraft data network bus for aeronautical, railway and military systems. The network is based on standard IEEE 802.3 Ethernet technology. AFDX extends the Ethernet standard by adding Quality of Service (QoS) and deterministic behavior with a guaranteed dedicated bandwidth. An AFDX network consists of so called End Systems and switches. An End System is a component connected to the AFDX network and capable of handling all AFDX related protocol operations. One or more switches, depending on the network hierarchy, are located on the data path between two End Systems. The point-to-point and point-to-multipoint connections are represented by virtual links (VL). The aim of the paper is to develop Transmitter scheduling Mechanism using the concept of BAG in verilog.