Low Complexity in Dual-Mode Double Precision Floating Point Division with Reduced Area

Abstract: Floating point is a core arithmetic widely used in scientific and engineering applications. This paper is used in proposed at architecture for dual mode double precision floating point division. It aimed to work on dual-mode functionality for single and double precision. It is used in the two pairs of single precision operands in parallel or double precision operand. A Radix-4MB multiplier is used for the mantissa computation. Other key components of floating point division flow(such as leading one detection, left/right dynamic shifters, rounding etc?) are also re-designed for the dual mode operation. This model is synthesized under Xilinx tool and compared the results with the single precision floating point division. The proven results is proposed design in efficient over the many related works of past over the area and delay.