AN ADVANCE OF THE THEORY OF THE WIDENED LONG FLIP-FLOP: PROPOSED IS FORMULATING IN THE LANGUAGE VERILOG

The Widened long flip-flop in a quality of a circuit of a finite-state automaton is attractive as a solution with constant asymptotic complexity for the task of checking multiple stack-at faults that has an exponential complexity. The article formulates the theory of Widened long flip-flop in the language of Verilog that provides an easy way to make all sorts of experiments with that theory, starting from validity check with respect to every product one plans to base on this theory. Besides, it reduces the cost of an outlay for designing and “making of metal” for any such product “to a very small amount”.