HIGH PERFORMANCE VLSI ON DISCRETE WAVELET TRANSFORM FOR IN VIDEO PROCESSING

The video compression in this paper aims to minimize memory space for transmission and storage for visual data. The Architecture of discrete wavelet transformation (DWT) uses robust mathematical operations to work on larger results. A DWT is therefore developed in this paper to increase the performance of the processor. The DWT has been engineered to minimize space, power consumption and rpm. The DWT is planned to fulfill the complex computational needs of potential chip designs. This reconfigurable architecture has a special memory interface which improves the efficiency of the design.