Development of trusted microprocessor software models and a microprocessor system

When developing a trusted microprocessor for digital SCM control systems (systems with a critical mission), it is necessary to develop a software model (emulator) of a trusted microprocessor and a system emulator based on it to approve the architectural model and to study the possibilities of parrying threats. Instruction-based and behavioral microprocessor emulators are tools for modeling the microprocessor architecture and the system as a whole. They play a fundamental role in various areas of microarchitecture design. Emulators are used as a reference model for functional verification and for assessing the contribution of new ideas introduced by developers at the microarchitecture level to the performance of the system as a whole, as well as for understanding the behavior of user programs and identifying hardware elements that limit the system effectiveness. The paper presents the criteria necessary for creating trusted systems, a developed instruction-based emulator of the trusted microprocessor microarchitecture (vmips), as well as a behavioral emulator of the microprocessor system architecture (QEMU) based on a trusted microprocessor to approve the architectural model and study the possibilities of parrying threats. There is a demonstration of software that tests the functions of the emulator to ensure the fulfillment of the system's trusted execution environment criteria by parrying threats from the FSTEC information security threats data bank. The paper also describes launching a demonstration task in a virtual environment on a virtual programmable logic controller with a trusted microprocessor using SCADA for monitoring and control. Using a virtual PLC with a virtual environment allows testing and debugging, conducting security studies, building models of existing and future nodes, working out various scenarios, and getting complete information about the work progress. Preliminary testing in a virtual environment also allows reducing the risks of commissioning and working out various threat models and their parrying before developing a microprocessor. Based on the results of the work performed, the development of a trusted microprocessor with a MIPS-like architecture for digital control systems of the SCM is planned in the future.