Amorphous Silicon Thin-Film Transistors Based Digital Circuits

This paper is concerned with the implementation of an amorphous silicon based thin-film transistor model and with amorphous silicon technology as an alternative technique of the implementation of digital circuits. The model reliability is validated by the investigation of amorphous silicon based NAND and NOR gates. The characterization includes high and low logic levels and propagation delay. The obtained results are presented and demonstrated to be reliable and strongly governed by simulation parameters. The results may serve as a foundation for amorphous silicon logic circuits design.