Simulation Results for a Crosstalk Avoidance and Low Power Coding Scheme for System on Chips

The major problems associated with System-on-Chip buses are Delay problem, Power problem and Reliability problem. Capacitive crosstalk and high power consumption due to various capacitances are the major causes of this problem. So, inorder to avoid these problems, a coding scheme is proposed which avoids crosstalk, reduces power consumption and increases reliability. This involves design of encoder and decoder modules. VHDL simulation of encoder and decoder modules are done using GHDL simulator.