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DESIGN AND IMPLEMENTATION OF LOW POWER ALU USING CLOCK GATING AND CARRY SELECT ADDER

Journal: International Journal of Electronics and Communication Engineering and Technology (IJECET) (Vol.7, No. 3)

Publication Date:

Authors : ; ; ;

Page : 116-129

Keywords : Low Power; ALU; Dynamic Power; Clock Power; Clock Gating; Carry Select Adder (CSLA); FPGA; HDL Programming; communication engineering; iaeme; research; IJECET; journal article; research paper; open access journals; international journals;

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Abstract

CPUs in general-purpose personal computers, such as desktops and laptops, dissipate significantly more power in the order of few watts because of their higher complexity and speed. ALU is a fundamental building block of CPU. It does all process related to arithmetic and logic operations. As the operations become more complex, the ALU become more complex, more expensive, takes up more space in the CPU and contributes more power dissipation within the CPU. Hence power consumption of ALU is a major issue in the designing of CPU.

Last modified: 2016-07-27 18:56:08