Design of Source Coupled Voltage Controlled Oscillator for the BPSK Costas Loop Filter
Journal: GRD Journal for Engineering (Vol.002, No. 2)Publication Date: 2016-12-18
Authors : P. Dhilipkumar; C. Chitra;
Page : 496-506
Keywords : Costas loop; PLL; voltage controlled oscillator;
Abstract
A 2GHz carrier recovery Costas Loop based BPSK detector is designed using CMOS 0.18μm technology. The designed BPSK detector consists of single to differential conversion circuit, phase/frequency detector, Voltage Controlled Oscillator (VCO), differential to single conversion circuit, first order loop filter and a third multiplier. Different architectures available for each block have been discussed along with the design methodology adopted. The schematics were simulated in analog design environment. These papers present a CMOS Voltage Controlled Oscillator with high oscillation frequency and low power consumption. It also describes the performance comparison of a current starved VCO and source coupled VCO for BPSK Costas Loop Filter. The designed Costas loop for BPSK detection is able to detect and demodulate data rates up to 50Mbps. The loop can track within the VCO frequency range of 1.99GHz to 2.01GHz. The lock range achieved for this loop is 20MHz. The power consumption of the Costas Loop BPSK detector was found to be 0.25mW.
Citation: P. Dhilipkumar, PSNA CET, ; Dr. C. Chitra ,. "Design of Source Coupled Voltage Controlled Oscillator for the BPSK Costas Loop Filter." Global Research and Development Journal For Engineering : 496 - 506.
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Last modified: 2016-12-19 01:38:51