Design of Synchronous NoC Router for System-on-Chip Communication and Implement in FPGA using VHDL?
Journal: International Journal of Computer Science and Mobile Computing - IJCSMC (Vol.2, No. 12)Publication Date: 2013-12-30
Authors : Arivu P Shanmugasundaram N Kamalanathan C Dr.S.Valarmathi;
Page : 308-317
Keywords : Cross-matrix; Router; Buffer; XY-Routing; Network-on-Chip; System-on-Chip;
Abstract
System on chip (SoC) is widely used in VLSI technology. In SoC more number of devices can be placed on a single chip. In the communication between the devices Network-on-Chip (NoC) concepts can be used .NoC is a highly integrated heterogeneous SoC architecture, it provides the platform to be reliable, cost and energy efficient. For effective communication, on-chip routers provided routing functionality with low complexity and relatively high performance. The low latency and high speed is achieved by allowing routing function for each input port and distributed arbiters which gives high level of parallelism. In this paper we discuss about the design and implementation of on-chip router architecture using VHDL.
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Last modified: 2013-12-27 20:28:09