DESIGN OF FLASH ANALOG-TO-DIGITAL CONVERTER USING HIGH GAIN COMPARATOR
Journal: International Journal of Electronics and Communication Engineering and Technology (IJECET) (Vol.8, No. 3)Publication Date: 2017-05-02
Authors : Naveen Kumar Meena; Anil Kumar Sharma;
Page : 67-74
Keywords : Analog-to-Digital Converter (ADC); CMOS Technology; Comparators; LSB; High Gain.;
Abstract
This paper describes the designing of Flash ADC using High Gain Comparator.ADC is an important building block in the modern era of communication. It is widely used in radar systems for subsequent signal processing. An analog to digital converter is used to converts a continuous physical quantity (usually voltage) to a digital number that represents the quantity's amplitude. In this project a 4-bit Flash ADC has been designed using 180nm technology. The basic building blocks of ADC are resistor ladder, comparator, and encoder. Firstly a resistive ladder circuit has been designed. Then we have designed analog comparator which is used to compare input signal with reference signal. Input signal is given in analog form and reference signal is generated by ladder. The output of comparator is given to the encoder. Encoder will convert the input (thermometer code) to binary output. In order to meet the requirement of low power and high speed, 180 nm CMOS technology has been chosen for design and simulation. The power dissipation of the designed circuit is 5.04 mW. The simulation has been performed with Cadence virtuoso using GPDK 180nm technology.
Other Latest Articles
- DESIGN OF LOW DROPOUT (LDO) VOLTAGE REGULATOR USING BULK MODULATION TECHNIQUE
- SALLEN-KEY FILTERS USING OPERATIONAL TRANSCONDUCTANCE AMPLIFIER
- SIMULATION & ANALYSIS OF AODV & DSDV ROUTING PROTOCOLS IN UNDERWATER WIRELESS SENSOR NETWORK USING AQUASIM NETWORK SIMULATOR
- QoS ENHANCEMENT IN 4G HETEROGENEOUS NETWORKS USING KALMAN FILTER & EWMA
- COMPARATIVE ANALYSIS OF VEDIC & ARRAY MULTIPLIER
Last modified: 2017-08-08 13:26:32