Low Power Design of 40 Gigabit Ethernet Media Access Controller Using Hyper Transport Protocol IO Standard
Journal: Sir Syed University Research journal of Engineering & Technology (SSURJ) (Vol.9, No. 1)Publication Date: 2019-06-25
Authors : Bhagwan Das M.F.L Abdullah Bishwajeet Pandey;
Page : 1-6
Keywords : Ethernet Media Access Controller (EMAC); Hyper Transport Protocol (HTP); Low Voltage Transistor- Transistor Logic (LVTTL); High-Speed Transceiver Logic (HSTL); UltraScale Field Programming Gate Array (UFPGA).;
Abstract
Nowadays, the low power design requirement for the communication equipment is becoming essential for green communication systems. The Ethernet Media Access Controller (EMAC) is an important source interfacing the physical devices. However, the high-speed data operation consumes an enormous power. This limits the performance of existing Ethernet Media Access Controllers in real-time. In this work, a novel low power design of 40G EMAC is developed using Hyper Transport Protocol (HTP) IO standard technique. The designed 40G EMAC is developed using Xilinx and tested for high frequencies of 5 THz, 10 THz, and 15 THz. The developed 40G EMAC using HTP IO standard is consuming less power for THz frequencies. It is also demonstrated that 70% power reduction is archived for 5THz, and for 10 THz and 15 THz, 69% and 68/% power reduction is attained respectively for 40G HTP based EMAC. The developed EMAC can be used in existing communication system in order to make the green networking.
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