Design and Implementation of Map Decoding for DB Convolutional Turbo Decoder
Journal: International Journal of Engineering Sciences & Research Technology (IJESRT) (Vol.3, No. 1)Publication Date: 2014-01-30
Authors : S.Sobana; M.Kasthuri; B.Poornema;
Page : 1-5
Keywords : s: MAP Decoder; SB/DB Decoding; Likelihood Ratio; Interleaver; CTC;
Abstract
This paper proposed an approximate Gaussian density evolution based MAP Decoder for high performance wireless communication. This paper considers a three node (source (S), relay (R) and destination (D)) wireless cooperative communication system, which can be considered as a building block for larger wireless networks. This proposed work adaptively changes the code and Modulation format according to the channel conditions, to improve performance without adding more network cooperation overhead. In proposed architecture, the higher throughput, less power consumption and less area are achieved. The architecture is implemented using spartan3E family and XC3S500E device in Xilinx 9.2i.The proposed system is written in VHDL language and synthesized in Xilinx 9.2i and stimulated using Modelsim 5.7. In 200MHz operation the Coprocessor consumes 79mW in static and 96mW in dynamic in the total summation of 175mW.
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Last modified: 2014-09-15 22:10:56