FFT Computation for Butterfly Unit using Verilog HDL

Radix-2 FFT algorithm is the simplest and most common form of the Cooley-Tukey algorithm. This considers radix-2 FFT processors and realization of butterfly operations. The properties, e.g., area and power consumption, of the FFT processor depend mainly on implementation of butterfly operations. These algorithms have been developed using verilog hardware descriptive language. Butterfly unit method reduces the number of multiplications and additions compared to formula method.