COMPARATIVE STUDY OF LOW POWER PULSE TRIGGERED FLIP-FLOP?Journal: International Journal of Computer Science and Mobile Computing - IJCSMC (Vol.3, No. 10)
Publication Date: 2014-10-30
Authors : S.PAVITHRA; B. MENAKA DEVI;
Page : 311-319
Keywords : Flip-flop; low power; pulse-triggered;
Flip-Flops are the critical timing elements in the digital circuits which have large impact on circuit speed and power consumption. The functioning of flip-flop is the important element in determining the efficiency of the system. In this brief a low power flip-flop (FF) based on signal feed through scheme is presented. The proposed design solves the long discharging path problem in conventional explicit type pulse-triggered FF designs and achieves better speed and power performance.
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Last modified: 2014-10-17 19:45:17