FPGA Interpolators With Reconfigurable and Multifrequency Approximate Computing using HEVC Fractional Pixel
Journal: International Journal of Science and Research (IJSR) (Vol.7, No. 5)Publication Date: 2018-05-05
Authors : Suma Gurulingaiah Charantimath; Ravi S M;
Page : 405-408
Keywords : Embedded applications; field programmable gate array FPGA; FIR filters; low power architectures; low power design; reconfigurable computing; runtime reconfiguration; signal processing;
Abstract
Applicable in different fields and markets, low energy high efficiency video coding (HEVC) codecs and their constituting elements have been heavily studied. Fractional pixel interpolation is one of its most costly blocks. In this work, a field programmable gate array implementation of HEVC fractional pixel interpolation, outperforming literature solutions, is proposed. Approximate computing, in conjunction with hardware reconfiguration, guarantees a tunable interpolation system offering energy versus quality tradeoff to further reduce energy.
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