Cascaded Multilevel Inverter Topology with Reduced Number of Switches

In this paper, a new cascaded multilevel inverter topology using reduced number of switches, insulated gate drive circuits and voltage standing on the switches is proposed. The proposed method reduces the installation area and cost and has simplicity of control system. This structure consists of cascaded sub-multilevel inverter blocks and an H-bridge inverter at the output. The proposed topology has been implemented through simulation and experimental results will be analysed.