Area Efficient Fixed-Point LMS Adaptive Filter

The proposed design presents an efficient architecture for the implementation of a delayed least mean square adaptive filter. A novel partial product generator (PPG) is used for area-delay efficient implementation and to reduce the adaptation delay. This paper presents a strategy for optimized balanced pipelining across the time-consuming combinational blocks of the structure. From synthesis result, it has been found that the proposed design offers less area-delay product (ADP) and less energy delay product (EDP) than the best of the existing systolic structures, on average, for filter lengths N= 8, 16 and 32. An efficient fixed-state error is proposed. It has been shown that the steady state mean squared error obtained from the analytical result matches with the simulation result.