A 1.2 V 34 μW SECOND ORDER ADC IN 0.13 μM CMOS FOR I-UWB RECEIVER

Analog to Digital converters are key to modern mixed signal circuit designs. Sigma-Delta (??) modulators form part of the core of today’s mixed signal designs. Nyquist Samplers require a complicated analog low pass filter to limit the maximum frequency input to the A/D and Sample and Hold circuit. Sigma-Delta ( ) modulation based Analog to Digital (A/D) conversion technology is a cost effective alternative for low power, high resolution (greater than 12 bits) converters, which can be ultimately integrated on Digital Signal Processor ICs. In this paper Over Sampling concept is used to address the problem of power dissipation, noise in ADCs and investigating the possibilities of utilizing alternative methods to reduce the noise and power dissipation in ADC architectures. This is achieved by design techniques namely Over Sampling, Second order Sigma-Delta architectures and Switched Capacitor based Sample & Hold circuits.