FPGA Implementation of ASK and FSK Modulator Based on Matlab/Xilinx System Generator

This paper presents an efficient approach for the implementation of typical communication structures studied in class. This scheme is beneficial where the objective is to implement the physical working of complex DSP or communication structures or algorithms without requiring detailed knowledge of hardware design and hardware description languages. The approach is based on the Xilinx System Generator for DSP tool, which integrates itself with the MATLAB, based Simulink Graphics environment and relieves the user of the textual HDL programming. The purposed design is the two independent ASK and FSK modulator. The ASK and FSK modulator are then simulated using Matlab/ Simulink environment and System Generator, FPGA design as well as implemented on a Spartan 6 (xc6slx16-3csg324/Nexys3) Kit board. The modulator algorithm has been implemented on FPGA using the VHDL language on Xilinx ISE Design suite 13.2.