A 10-BIT 25 MS/S PIPELINED ADC USING 1.5-BIT SWITCHED CAPACITANCE BASED MDAC IN 180NM CMOS

The primary motivation of the work presented in this paper is to significantlyreduce power consumption in pipelined ADCs using Switched Capaci tance based MDAC with Opamp Sharing configuration. ADC power reduction enables longerbattery life in mobile applications, and lower cost packaging in wired applications.For conventional ADCs differential amplifiers dominate the power dissipation in most high-speed analog to digital conversion applications.