DESIGN OF COMMUNICATION INTERFACE WITH DMA AND MEMORY USING AHB WITH UART PERIPHERAL

I2C is a two wire, bidirectional serial bus that provides effective data communication between two devices. Problem starts when one module follows different protocol as others and each module has its different bit rate or baud rate of data transfer which can be either asynchronous or synchronous. I2C bus supports many devi ces and each device is recognized by its unique address. The proposed architecture is a bridge between I2C Master and APB Salve. The data travels from a serial bus (I2C) to parallel bus (APB) to serial (I2C) in sync with the respective domain clock. This forms a bidirectional interface between I2C supported module and APB supported module.