A Novel Design of Reversible Universal Shift Register
Journal: International Journal of Computer Science and Mobile Computing - IJCSMC (Vol.3, No. 3)Publication Date: 2014-03-30
Authors : Rashid Anwar Jobbin Abraham Ben;
Page : 530-535
Keywords : Flip Flop; Multiplexer; Reversible logic Gate; Garbage Output; Quantum Cost;
Abstract
Reversible logic gates provide power optimization which can be used in low power CMOS design, optical computing, quantum computing and nanotechnology. This paper propose a new 4*4 reversible RR gate that works as a reversible 4:1 multiplexer and has a reduced quantum cost. A novel design of Reversible Universal shift register using RR gates with reduced delay and quantum cost is proposed.
Other Latest Articles
- Agile Programming and Design Patterns on Web Applications Using J2EE and Ruby on Rails ?A Case Study?
- Service Quality and Student Satisfaction: A Case Study in Private Management Institutions in Chittoor District of Andhra Pradesh
- Borrower Rating Related to Credit Risk in Commercial Banks
- Usage of Information Technology to Enhance Professional Productivity among Accountants in Ekiti State
- Challenges of Self Help Group Members towards Income Generation Activity
Last modified: 2014-03-23 00:06:37