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Design and Implementation of 15-Level & 25-Level Multilevel Inverter with Reduced Switching Count

Journal: International Journal of Mechanical and Production Engineering Research and Development (IJMPERD ) (Vol.10, No. 3)

Publication Date:

Authors : ; ;

Page : 9103-9116

Keywords : Multilevel Inverter (MLI); Pulse Width Modulation (PWM); Power Electronics; Single-Phase Inverter; Reduce Switch Count; Total Harmonic Distortion (THD);

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In high and medium AC power applications, multilevel inverters (MLI) have significant importance in modern days. The architecture of multi-level inverter is preferred because of reduced harmonic distortion, high quality AC output power, least switching loss and minimum switching stress. The principal topology requires three dc voltage sources and ten changes to produce 15 levels over the heap. The augmentation of the main topology has been proposed as the subsequent topology, which comprises of four dc voltage sources and 12 changes to accomplish 25 levels at the yield. The DC supply for multilevel inverter is taken from solar panel with MPPT technique. The new multilevel inverter circuit topology, switching pattern and gate pulse making is explained in this paper. The Fast Fourier Transform (FFT) analysis of the outputs of 15-level and 25-level of multilevel inverters are shown in below. The new 12-switch 25 multilevel inverter circuit has been intended and modeled by using MATLAB software Simulink tool. The simulation results are displayed with less total harmonic distortion and reduced switching loss has been achieved.

Last modified: 2020-11-18 19:32:08