Fluidic Electronics: Logic Gates

In this paper, a novel Fluidic electronics logic gate, with two asymmetric reservoirs connected to a nanoporous PCTE membrane, of few microns in length, connected to another two asymmetric reservoirs connected to a nanoporous PCTE membrane, of few microns in length, with the entire Two Reservoirs+nanoporous membrane connected in parallel and the output reservoir is connected to the combined Two Reservoirs+nanoporous membrane unit. The Two Reservoirs+nanoporous membrane is electrically driven by Pt electrodes where the unit is filled with KCl electrolyte solution. The resulting electrokinetic transport, current, shows the Fludic Electronics: Logic gate processor.