Share Your Research, Maximize Your Social Impacts
LDPC Minimum Sum Algorithm Decoder with Weight (3, 6) Regular Parity Check Matrix: A Review
Journal: International Journal of Science and Research (IJSR) (Vol.3, No. 9)Publication Date: 2014-09-05
Authors : Mamta Prakash; Girraj Prasad Rathore;
Page : 2033-2034
Keywords : LDPC; Decoder; Min-sum Algorithm; FPGA;
Source : Download
Find it from : Google Scholar
Abstract
Low-Density parity-check (LDPC) codes are unit one in every of the foremost powerful error correcting codes obtainable nowadays. Their Shannon capability approaching performance and lower cryptography quality have created them the simplest choice for several wired and wireless applications. This paper offers a review on the one of the best technique for error detection and correction. The paper includes all the previous work related to the LDPC codes.
Other Latest Articles
- Profile of a Leader in the Western Balkans Cultural Environment
- Phonological Processes In Nouns across Maasai Dialects
- Adapted Method for Solving Linear Voltterra Integral Equations of the Second kind Using Corrected Simpson's Rule
- Batch Gradient Method with Smoothing L1/2 Regularization and Momentum for Pi-sigma Networks
- Identifying the Impacts of Land Use-Land Cover Changes and Soil Erosion Risk on Water Quality and Watershed Health - A Case Study of River Enderit in Nakuru County, Kenya
Last modified: 2021-06-30 21:07:44