Design and Implementation of Argo And Falp Method on NOC and Their Analysis

Most communication traffic in today's Network on Chips (NOC) is based on router for volatile memory based designs. The NOC should be designed to efficiently handle the many-to-one communication pattern, data access to and from the routing controller. This paper motivate the use of separate network for routing and justify the power consumption and performance improvement is obtained by using Argo and FALP methods, when compared to traditional round robin method. The paper shows how the congestion is avoided using Argo method and state transition based Finite State Machine memory controller is designed for on-chip cores which optimize area and power. Our experiments on a realistic NOC multimedia benchmark shows a large reduction in power consumption and improvement in throughput when compared to existing solutions.