Wide Range Enable Level Shifter for Multi-Supply Voltage Designs

In the current SoC design methodologies, the multi supply voltage and power gating techniques are used widely which require special cells in design. A new enable level shifter is designed which comprises the function of level shifter and isolation cell. The voltage level shifting is achieved by the use of modified Wilson current mirror circuits, which gives wide range of input voltage. In the given ELS, the output will be clamped to ground when the enable signal is high i. e. during the power domain shut down. This avoids the false triggering of transistors in the subsequent blocks. The proposed ELS is designed using SPICE model of 32nm technology and simulated. The ELS can reliably convert 100mV input voltage to 0.9V, with the delay of 5ns. The power consumption of the cell is 100nW at 0.9V input voltage.