A Trench Gate Power MOSFET with Reduced Gate Charge - A Review

In this paper we have written the review of the work done by Ying Wang, Yan-Juan Liu, Cheng-Hao Yu, and Fei Cao in simulating a novel trench gate power MOSFET with reduced gate charge. They worked with a 2-dimensional device simulator named ATLAS and simulated their MOSFET to obtain input, output and transfer characteristics. It is found that the gate charge is reduced by 49.5 % without increasing the value of Ron. This is done so as to increase the switching speed of the device.