Implementation of Vedic Multiplier in Image Compression Using Discrete Wavelet Transform (DWT) Algorithm

Fast Multiplication is one of the most momentous parts in any processor speed which progresses the speed of the manoeuvre like in exceptional application processor like Digital signal processor (DSPs). In this paper Implementation of Vedic Multiplier in Image Compression using DWT Algorithm is being in attendance. The DWT is used to crumble the image into different group of images and the research work in this paper represents the effectiveness of Urdhva Triyagbhyam Vedic Method in Image firmness for burgeoning which smacks a difference in authentic process of multiplication itself.A novelVedic multiplier with less number of half adders and Full Addersis proposed in order to overcome such an error. Simulation is done in Matlab2008a and Modelsim10.0b.Synthesis and Implementation is performed by Xilinx 14.