Implementation & Comparative Analysis of CMOS vs GDI for 8T SRAM Functionality under Power, Delay over Performance

The Technology behind every electronic gadgets or device has a rapid growth in the market and also in the industry. As all the complex electronic devices are operating at higher frequency and operating in sub threshold region, which leads to delivering higher leakage power at lower operating voltages, and especially when the technology is gradually increasing, mostly in cmos design. So there ought to be a reliable mode of circuit or structure which can be a tradeoff between speed, power and area. So the broad side of this work designates the analysis of Gate diffused input method (GDI) which can be an alternative logic for the implementation of SRAM bit cell instead of CMOS, and relative, comparative analysis of delay & power of CMOS with GDI at 0.4v at 32nm Synopsys tools by obtaining the proper characteristics of ac and dc analysis.