Network on Hybrid Processors based High End Embedded System

High end embedded systems with multiple hybrid processors generally suffer performance issues like low throughput and backpressure due to bandwidth sharing between multiple data streams. Performance requirements become even more stringent for programmable, modular and re-configurable systems. This paper presents a novel Network-on-System (NoS) architectural concept to improve the throughput of hybrid processors based high end embedded systems. Every programmable hybrid processor has multiple peripheral interfaces. In most applications, all of these interfaces are never used and are available for communication with other devices. These interfaces can be used to design a hybrid processing element based embedded system for high end applications. In this concept, hybrid processors, in addition to their specific tasks in a system, behave as network interfaces and routers similar to a Network-on-Chip (NoC). The working methodology for NoS, which is based on the transfer of packets and flits in the network, is also presented. A mapping of a network interface and router on a general purpose Digital Signal Processor (DSP), utilizing the Direct Memory Access (DMA) features, is also discussed in detail. The proposed architecture is perfectly suited for complex embedded systems addressing programmable and re-configurable application requirements.