BUILT IN REDUNDANCY ALGORITHMS FOR MEMORY YIELD ENHANCEMENT

With the latest developments in VLSI technology, the size of memories is rapidly growing. The yield criteria and testing problems have become the most critical areas for memory manufacturing. Traditionally, redundancies are applied so that the faulty cells can be repairable. Using external memory testers redundancy analysis is becoming slow as the chip density continues to grow, especially for the system chip with big embedded memories. This paper presents three redundancy allocation algorithms which can be implemented on-chip. Out of three algorithms, two are based on the local-bitmap concept: the local repair-most approach is good for a general spare configuration, and the local optimization approach has the better repair rate. The essential spare pivoting technique is proposed to simplify control circuitry.