HIGH SPEED WIDE FAN - IN DATA SELECTOR USING CURRENT COMPARISON DOMINO IN SYNOPSYS HSPICE

In this paper, we tend to implement seven circuit topologies of domino to boost the speed and to lower the consumption of total power. Domino logic circuits are used for prime performance and high speed applications. A data selector circuit is proposed based on new high speed and noise immune domino logic circuit named as Current Comparison based Domino (CCD). The CCD reduces parasitic capacitance implies to small keeper and low leakage current, which results fast, robust and improved noise immune design for wide fan - in (64 - input) gates. The logic circuits are simulated using Synopsys HSPICE tool with 16 - nm V2.1 high - performance predictive technology models at 110 °C and 0.8 V supply voltage. The simulation results unconcealed that prime speed of CCD offers the most effective in terms of noise - immunity and power consumption at the constant delay are compared with standard domino circuit for 64 - bit OR gates. The data selector (Mux) logic is implemented in CCD logic